By Abhishek Parikh


2019-02-08 06:55:11 8 Comments

I am using a MSP430FR2633 micro controller and ADS122C04IPWR DAC over I2C at 100kHz.

Can I route the I2C lines through vias in a 2 Layer PCB?

4 comments

@Graham 2019-02-08 12:02:40

100kHz is pretty easy to move around. Our equipment has I2C EEPROMs mounted in a customer-replaceable part of the system, so that changes to calibration when that part is replaced will automatically be read by the controller. The cables for this can be metres long, and so far that's working OK. Admittedly we do have low-capacitance cables, but still, a PCB via is no big deal.

Note though that whilst 100kHz is the original I2C standard frequency, it's not the end of the story. I2C "Fast Mode" allows up to 400kHz, "Fast Mode Plus" allows up to 1MHz, and "High-Speed Mode" allows up to 3.4MHz. Looking at the datasheet, your DAC does support "Fast Mode Plus" up to 1MHz. So long as you're staying at 100kHz then you can basically do whatever you want because it's not fast enough to matter, but if you might want to go faster in future then you should investigate design rules for faster digital signals.

That said, the DAC itself can only manage 2K samples per second though. For a 24-bit DAC plus the associated I2C overhead, data transfers will only take about 70-80% of the bandwidth on a 100kHz link. If you have multiple DACs on the same I2C link then you might want to use a faster link to service them all, but if you only have a single DAC then you don't have a reason to go faster than 100kHz.

@Neil_UK 2019-02-08 08:32:56

At I2C speeds, vias will cause you absolutely no problems at all.

At least, no problems in terms of track resistance, capacitance or inductance. However, if you have a 2 layer board, then using both layers is best done systematically, otherwise you can lead yourself into problems.

What many people do is to dedicate one layer of a board to ground. This generally works well, UNTIL they start chopping the ground up with 'just one track' run on the other layer. When this track is joined by 'just another', and another, the ground ends up looking like a lace curtain. It doesn't do its job, and it's difficult to determine where and how to stitch it back together, especially if you're inexperienced. Even worse, some will route all the tracks, then do a 'copper pour', in the hope that this makes a good ground plane.

If you're using 2 layers for signals, then it's far better to start with a plan. Use a 'Manhattan' tracking arrangement, east-west on one layer, north-south on the other. Start with a 'gridded ground', put parallel tracks every 10mm or so, and via them at every intersection. This works almost as well as a ground plane, and at I2C speeds is absolutely as good. Now you have a systematic way to run a track from anywhere, to anywhere, and can hop to the other side of the board exactly where you need to, without disturbing the existing ground continuity.

An alternative is to use a ground plane, but to avoid chopping it up by staying on your signal layer for all signals. Cross tracks by passing tracks under components. You can buy 'zero ohm' resistors for this purpose, though a 1 or even 10 ohm resistor will be as good as a wire at I2C resistance levels.

@Michael 2019-02-08 11:28:55

To avoid chopping up the ground plane it helps to keep tracks on it as short as possible. Only use it to cross tracks, not to cover any distance. It also helps to look at the actual electrical distance between components to a common ground. For example from decoupling caps to the IC they are supposed to decouple (often people just look at the VDD wire).

@Neil_UK 2019-02-08 12:17:09

@Michael You are of course correct. I was torn between not mentioning layout at all, and giving a thorough layout answer. Perhaps this partial answer falls between two stools. How well we handle grounding issues depends so much on experience.

@Arsenal 2019-02-08 07:39:53

Shouldn't be a problem. We are using vias on I²C which are running up to 800 kHz without any issues.

The worst I have seen was a bad via, which created a series resistance in the I²C line. That affected the slew rate of the board so bad that the I²C communication failed. But that was on a prototype board and has never happened on a production board so far.

@filo 2019-02-08 07:26:50

In general - yes. 100 kHz signal is very forgiving. Make sure to route both SDA and SCL in a similar fashion, close together.

Also keep in mind the I2C total capacitance limit of 400 pF (you could run into that issue if the traces were really long).

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